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 CY62157CV30/33
512K x 16 Static RAM
Features
* Temperature Ranges -- Automotive-A: -40C to 85C -- Automotive-E: -40C to 125C * Voltage range: -- CY62157CV30: 2.7V-3.3V -- CY62157CV33: 3.0V-3.6V * Ultra-low active power -- Typical active current: 1.5 mA @ f = 1 MHz -- Typical active current: 5.5 mA @ f = fmax * Low standby power * Easy memory expansion with CE1, CE2 and OE features * Automatic power-down when deselected * CMOS for optimum speed/power * Available in Pb-free and non Pb-free 48-ball FBGA package significantly reduces power consumption by 80% when addresses are not toggling. The device can also be put into standby mode reducing power consumption by more than 99% when deselected (CE1 HIGH or CE2 LOW or both BLE and BHE are HIGH). The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE1 HIGH or CE2 LOW), outputs are disabled (OE HIGH), both Byte High Enable and Byte Low Enable are disabled (BHE, BLE HIGH), or during a write operation (CE1 LOW and CE2 HIGH and WE LOW). Writing to the device is accomplished by taking Chip Enable 1 (CE1) and Write Enable (WE) inputs LOW and Chip Enable 2 (CE2) HIGH. If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O0 through I/O7), is written into the location specified on the address pins (A0 through A18). If Byte High Enable (BHE) is LOW, then data from I/O pins (I/O8 through I/O15) is written into the location specified on the address pins (A0 through A18). Reading from the device is accomplished by taking Chip Enable 1 (CE1) and Output Enable (OE) LOW and Chip Enable 2 (CE2) HIGH while forcing the Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data from the memory location specified by the address pins will appear on I/O0 to I/O7. If Byte High Enable (BHE) is LOW, then data from memory will appear on I/O8 to I/O15. See the truth table at the back of this data sheet for a complete description of read and write modes. The CY62157CV30/33 are available in a 48-ball FBGA package.
Functional Description[1]
The CY62157CV30/33 are high-performance CMOS static RAMs organized as 512K words by 16 bits. These devices feature advanced circuit design to provide ultra-low active current. This is ideal for providing More Battery LifeTM (MoBLTM) in portable applications such as cellular telephones. The devices also have an automatic power-down feature that
Logic Block Diagram
A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 DATA IN DRIVERS
ROW DECODER
512K x 16 RAM Array
SENSE AMPS
I/O0-I/O7 I/O8-I/O15
COLUMN DECODER
A11 A12 A13 A14 A15 A16 A17 A18
BHE WE OE BLE
CE2 CE1
Power -down Circuit
BHE BLE
CE2 CE1
Note: 1. For best practice recommendations, please refer to the Cypress application note "System Design Guidelines" on http://www.cypress.com.
Cypress Semiconductor Corporation Document #: 38-05014 Rev. *F
*
198 Champion Court
*
San Jose, CA 95134-1709 * 408-943-2600 Revised August 31, 2006
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CY62157CV30/33
Product Portfolio
Power Dissipation Operating (ICC) mA VCC Range Product CY62157CV30 CY62157CV33 Range Automotive-E Automotive-A Automotive-E Min. 2.7V 3.0V Typ.[2] 3.0V 3.3V Max. 3.3V 3.6V f = 1 MHz Typ.[2] 1.5 1.5 1.5 Max. 3 3 3 7 5.5 7 f = fmax Typ.[2] Max. 15 12 15 Standby (ISB2) A Typ.[2] 8 10 10 Max. 70 30 80
Pin Configurations[2, 3, 4]
FBGA (Top View)
1 2 3 4 5 6
BLE I/O8 I/O9 VSS VCC I/O14 I/O15 A18
OE BHE I/O10 I/O11 I/O12 I/O13 NC A8
A0 A3 A5 A17 DNU A14 A12 A9
A1 A4 A6 A7 A16 A15 A13 A10
A2 CE1 I/O1 I/O3 I/O4 I/O5 WE A11
CE2 I/O0 I/O2 VCC VSS I/O6 I/O7 NC
A B C D E F G H
Pin Definitions
Name Input Input/Output Input/Control Input/Control Input/Control Input/Control Ground A0-A18. Address Inputs I/O0-I/O15. Data lines. Used as input or output lines depending on operation WE. Write Enable, Active LOW. When selected LOW, a WRITE is conducted. When selected HIGH, a READ is conducted. CE1. Chip Enable 1, Active LOW. CE2. Chip Enable 2, Active HIGH. OE. Output Enable, Active LOW. Controls the direction of the I/O pins. When LOW, the I/O pins behave as outputs. When deasserted HIGH, I/O pins are three-stated, and act as input data pins Vss. Ground for the device Definition
Power Supply Vcc. Power supply for the device
Notes: 2. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ.), TA = 25C. 3. NC pins are not connected on the die. 4. E3 (DNU) can be left as NC or VSS to ensure proper application.
Document #: 38-05014 Rev. *F
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CY62157CV30/33
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ................................. -65C to +150C Ambient Temperature with Power Applied............................................. -55C to +125C Supply Voltage to Ground Potential ...-0.5V to Vccmax + 0.5V DC Voltage Applied to Outputs in High-Z State[5] ....................................-0.5V to VCC + 0.3V DC Input Voltage[5] .................................-0.5V to VCC + 0.3V Output Current into Outputs (LOW) .............................20 mA Device Range Static Discharge Voltage.......................................... > 2001V (per MIL-STD-883, Method 3015) Latch-up Current ................................................... > 200 mA
Operating Range
Ambient Temperature [TA][6] VCC
CY62157CV30 Automotive-E -40C to +125C 2.7V - 3.3V CY62157CV33 Automotive-A -40C to +85C 3.0V - 3.6V Automotive-E -40C to +125C
Electrical Characteristics Over the Operating Range
CY62157CV30-70 Parameter VOH VOL VIH VIL IIX IOZ ICC Description Output HIGH Voltage IOH = -1.0 mA Output LOW Voltage Input HIGH Voltage Input LOW Voltage Input Leakage Current Output Leakage Current VCC Operating Supply Current Automatic CE Power-Down Current-- CMOS Inputs Automatic CE Power-Down Current--CMOS Inputs GND < VI < VCC GND < VO < VCC, Output Disabled f = fMAX = 1/tRC f = 1 MHz CE1 > VCC - 0.2V or CE2 < 0.2V VIN > VCC - 0.2V or VIN < 0.2V, f = fmax (Address and Data Only), f = 0 (OE, WE, BHE and BLE) CE1 > VCC - 0.2V or CE2 < 0.2V VIN > VCC - 0.2V or VIN < 0.2V, f = 0, VCC = 3.3V VCC = 3.3V IOUT = 0 mA CMOS Levels IOL = 2.1 mA Test Conditions VCC = 2.7V VCC = 2.7V 2.2 -0.3 -10 -10 7 1.5 8 Min. 2.4 0.4 VCC + 0.3V 0.8 +10 +10 15 3 70 A Typ.[2] Max. Unit V V V V A A mA
ISB1
ISB2
8
70
A
Notes: 5. VIL(min.) = -2.0V for pulse durations less than 20 ns. 6. TA is the "Instant-On" case temperature.
Document #: 38-05014 Rev. *F
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CY62157CV30/33
Electrical Characteristics Over the Operating Range
CY62157CV33-70 Parameter VOH VOL VIH VIL IIX IOZ ICC Description Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage Input Leakage Current Output Leakage Current VCC Operating Supply Current GND < VI < VCC GND < VO < VCC, Output Disabled f = fMAX = 1/tRC f = 1 MHz ISB1 Automatic CE Power-Down Current--CMOS Inputs CE1 > VCC - 0.2V or CE2 < 0.2V VIN > VCC - 0.2V or VIN < 0.2V, f = fmax (Address and Data Only), f = 0 (OE,WE,BHE,and BLE) CE1 > VCC - 0.2V or CE2 < 0.2V VIN > VCC - 0.2V or VIN < 0.2V, f = 0, VCC = 3.6V Auto-A Auto-E Auto-A Auto-E VCC = 3.6V Auto-A IOUT = 0 mA Auto-E CMOS Levels Auto-A/ Auto-E Auto-A Auto-E IOH = -1.0 mA VCC = 3.0V IOL = 2.1 mA VCC = 3.0V 2.2 -0.3 -1 -10 -1 -10 5.5 7 1.5 10 10 Test Conditions Min. 2.4 0.4 VCC + 0.3V 0.8 +1 +10 +1 +10 12 15 3 30 80 A A Typ.[2] Max. Unit V V V V A A A A mA
ISB2
Automatic CE Power-Down Current--CMOS Inputs
Auto-A Auto-E
10 10
30 80
A A
Thermal Resistance[7]
Parameter JA JC Description Thermal Resistance (Junction to Ambient) Thermal Resistance (Junction to Case) Test Conditions Still Air, soldered on a 3 x 4.5 inch, two-layer printed circuit board FBGA 55 16 Unit C/W C/W
Note: 7. Tested initially and after any design or process changes that may affect these parameters.
Document #: 38-05014 Rev. *F
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CY62157CV30/33
Capacitance[7]
Parameter CIN COUT Description Input Capacitance Output Capacitance Test Conditions TA = 25C, f = 1 MHz, VCC = VCC(typ.) Max. 6 8 Unit pF pF
AC Test Loads and Waveforms
R1 VCC OUTPUT 30 pF INCLUDING JIG AND SCOPE R2
VCC Typ 10% GND Rise TIme: 1 V/ns ALL INPUT PULSES 90% 90% 10% Fall Time: 1 V/ns
Equivalent to:
THEVENIN EQUIVALENT RTH VTH
OUTPUT
Parameters R1 R2 RTH VTH
3.0V 1.105 1.550 0.645 1.75
3.3V 1.216 1.374 0.645 1.75
Unit V
Data Retention Characteristics (Over the Operating Range)
Parameter VDR ICCDR Description VCC for Data Retention Data Retention Current VCC = 1.5V, CE1 > VCC - 0.2V or CE2 < 0.2V, VIN > VCC - 0.2V or VIN < 0.2V Auto-A Auto-E 0 tRC Conditions Min. 1.5 4 4 20 60 Typ.[2] Max. Unit V A A ns ns
tCDR[8] tR[8]
Chip Deselect to Data Retention Time Operation Recovery Time
Data Retention Waveform[9]
DATA RETENTION MODE VCC CE1 or BHE.BLE or CE2 VCC(min.) tCDR VDR > 1.5 V VCC(min.) tR
Notes: 8. Full Device AC operation requires linear VCC ramp from VDR to VCC(min.) > 100 s or stable at VCC(min.) >100 s. 9. BHE.BLE is the AND of both BHE and BLE. Chip can be deselected by either disabling the chip enable signals or by disabling both BHE and BLE.
Document #: 38-05014 Rev. *F
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CY62157CV30/33
Switching Characteristics Over the Operating Range [10]
70 ns Parameter Read Cycle tRC tAA tOHA tACE tDOE tLZOE tHZOE tLZCE tHZCE tPU tPD tDBE tLZBE[11] tHZBE Write Cycle[14] tWC tSCE tAW tHA tSA tPWE tBW tSD tHD tHZWE tLZWE Write Cycle Time CE1 LOW and CE2 HIGH to Write End Address Set-up to Write End Address Hold from Write End Address Set-up to Write Start WE Pulse Width BHE/BLE Pulse Width Data Set-up to Write End Data Hold from Write End WE LOW to WE HIGH to High-Z[11, 12] Low-Z[11] 5 70 60 60 0 0 50 60 30 0 25 ns ns ns ns ns ns ns ns ns ns ns Read Cycle Time Address to Data Valid Data Hold from Address Change CE1 LOW and CE2 HIGH to Data Valid OE LOW to Data Valid OE LOW to Low-Z
[11]
Description
Min. 70
Max.
Unit ns
70 10 70 35 5 25 10 25 0 70 70 5 25 High-Z[11, 12]
ns ns ns ns ns ns ns ns ns ns ns ns ns
OE HIGH to High-Z[11, 12] CE1 LOW and CE2 HIGH to Low-Z[11] CE1 HIGH or CE2 LOW to CE1 LOW and CE2 HIGH to Power-up CE1 HIGH or CE2 LOW to Power-down BHE/BLE LOW to Data Valid BHE/BLE LOW to BHE/BLE HIGH to Low-Z[13] High-Z[11, 12]
Notes: 10. Test conditions assume signal transition time of 5 ns or less, timing reference levels of VCC(typ.)/2, input pulse levels of 0 to VCC(typ.), and output loading of the specified IOL/IOH and 30-pF load capacitance. 11. At any given temperature and voltage condition, tHZCE is less than tLZCE, tHZBE is less than tLZBE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any given device. 12. tHZOE, tHZCE, tHZBE, and tHZWE transitions are measured when the outputs enter a high-impedance state. 13. When both byte enables are toggled together this value is 10 ns. 14. The internal Write time of the memory is defined by the overlap of WE, CE1 = VIL, BHE and/or BLE = VIL, CE2 = VIH. All signals must be ACTIVE to initiate a Write and any of these signals can terminate a Write by going INACTIVE. The data input set-up and hold timing should be referenced to the edge of the signal that terminates the Write.
Document #: 38-05014 Rev. *F
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CY62157CV30/33
Switching Waveforms
Read Cycle No. 1 (Address Transition Controlled)[15, 16]
tRC ADDRESS tOHA DATA OUT PREVIOUS DATA VALID tAA DATA VALID
Read Cycle No. 2 (OE Controlled)[16, 17]
ADDRESS tRC CE1 CE2 tACE OE tHZBE BHE/BLE tLZBE tDOE DATA OUT VCC SUPPLY CURRENT tLZOE HIGH IMPEDANCE tLZCE tPU 50%
tHZOE tHZCE DATA VALID tPD 50% ISB ICC HIGH IMPEDANCE
Notes: 15. Device is continuously selected. OE, CE1 = VIL, BHE and/or BLE = VIL, CE2 = VIH. 16. WE is HIGH for Read cycle. 17. Address valid prior to or coincident with CE1, BHE, BLE transition LOW and CE2 transition HIGH.
Document #: 38-05014 Rev. *F
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CY62157CV30/33
Switching Waveforms (continued)
Write Cycle No. 1 (WE Controlled)[14, 18, 19]
tWC ADDRESS tSCE CE1
CE2 tAW tSA WE tPWE tHA
BHE/BLE
tBW
OE tSD DATA I/O tHD
NOTE 20
tHZOE
DATAIN VALID
Notes: 18. Data I/O is high-impedance if OE = VIH. 19. If CE1 goes HIGH or CE2 goes LOW simultaneously with WE HIGH, the output remains in a high-impedance state. 20. During this period, the I/Os are in output state and input signals should not be applied.
Document #: 38-05014 Rev. *F
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CY62157CV30/33
Switching Waveforms (continued)
Write Cycle No. 2 (CE1 or CE2 Controlled) [14, 18, 19]
tWC ADDRESS tSCE CE1
CE2
tSA
tAW tPWE
tHA
WE
BHE/BLE
tBW
OE tSD DATA I/O tHD
NOTE 20
tHZOE
DATAIN VALID
Write Cycle No. 3 (WE Controlled, OE LOW)[19]
tWC ADDRESS tSCE CE1
CE2
BHE/BLE tAW tSA WE
tBW
tHA tPWE
tSD DATAI/O
tHD
NOTE 20
tHZWE
DATAIN VALID tLZWE
Document #: 38-05014 Rev. *F
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CY62157CV30/33
Switching Waveforms (continued)
Write Cycle No. 4 (BHE/BLE Controlled, OE LOW)[19]
tWC ADDRESS
CE1 CE2 tSCE
tAW BHE/BLE tSA WE tPWE tSD DATA I/O tHD tBW tHA
NOTE 20
DATAIN VALID
Truth Table
CE1 H X X L L L L L L L L L CE2 X L X H H H H H H H H H WE X X X H H H H H H L L L OE X X X L L L H H H X X X BHE X X H L H L L H L L H L BLE X X H L L H L L H L L H Inputs/Outputs High Z High Z High Z Data Out (I/OO-I/O15) Data Out (I/OO-I/O7); I/O8-I/O15 in High Z Mode Deselect/Power-Down Deselect/Power-Down Deselect/Power-Down Read Read Power Standby (ISB) Standby (ISB) Standby (ISB) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Active (ICC)
Data Out (I/O8-I/O15); Read I/O0-I/O7 in High Z High Z High Z High Z Data In (I/OO-I/O15) Data In (I/OO-I/O7); I/O8-I/O15 in High Z Data In (I/O8-I/O15); I/O0-I/O7 in High Z Output Disabled Output Disabled Output Disabled Write Write Write
Document #: 38-05014 Rev. *F
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CY62157CV30/33
Typical DC and AC Characteristics [2]
Operating Current vs. Supply Voltage
14.0 12.0 ICC (mA) 10.0 8.0 6.0 4.0 2.0 (f = 1 MHz) (f = fmax, 70ns) MoBL ICC (mA) 14.0 12.0 10.0 8.0 6.0 4.0 2.0 (f = 1 MHz) 0.0 3.0 2.7 3.3 SUPPLY VOLTAGE (V) (f = fmax, 70ns) MoBL ICC (mA) 14.0 12.0 10.0 8.0 6.0 4.0 (f = 1 MHz) 0.0 3.3 3.0 3.6 SUPPLY VOLTAGE (V) 2.0 (f = fmax, 70ns) MoBL
0.0 2.2 2.5 2.7 SUPPLY VOLTAGE (V)
Standby Current vs. Supply Voltage
12.0 ISB (A) ISB (A) 10.0 8.0 6.0 4.0 2.0 0 2.2 2.5 2.7 SUPPLY VOLTAGE (V) MoBL 12.0 MoBL ISB (A) 10.0 8.0 6.0 4.0 2.0 0 2.7 3.0 3.3 SUPPLY VOLTAGE (V) 12.0 MoBL 10.0 8.0 6.0 4.0 2.0 0 3.0 3.3 3.6 SUPPLY VOLTAGE (V)
Access Time vs. Supply Voltage
60 50 40 TAA (ns) TAA (ns) 30 20 10 0 2.2 2.5 2.7 MoBL 60 50 40 TAA (ns) 30 20 10 0 2.7 3.0 3.3 MoBL 60 50 40 30 20 10 0 3.0 3.3 3.6 MoBL
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
Document #: 38-05014 Rev. *F
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CY62157CV30/33
Ordering Information
Speed (ns) 70 Ordering Code CY62157CV30LL-70BAE CY62157CV33LL-70BAXA CY62157CV33LL-70BAE Package Diagram 51-85128 Package Type 48-Ball (6 mm x 10 mm x 1.2 mm) FBGA Operating Range Automotive-E Automotive-A Automotive-E
Package Diagram
48-Ball (6 mm x 10 mm x 1.2 mm) FBGA (51-85128)
TOP VIEW BOTTOM VIEW A1 CORNER O0.05 M C O0.25 M C A B A1 CORNER O0.300.05(48X) 1 2 3 4 5 6 6 5 4 3 2 1
A B C 10.000.10 10.000.10 0.75 5.25 D E F G H
A B C D E 2.625 F G H
A B 6.000.10
A
1.875 0.75 3.75
0.530.05
0.25 C
B 0.210.05 0.15 C 0.15(4X)
6.000.10
SEATING PLANE 0.36 C 1.20 MAX
51-85128-*D
MoBL, MoBL2, and More Battery Life are trademarks of Cypress Semiconductor Corporation. All product and company names mentioned in this document may be the trademarks of their respective holders.
Document #: 38-05014 Rev. *F
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(c) Cypress Semiconductor Corporation, 2006. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.
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CY62157CV30/33
Document History Page
Document Title: CY62157CV30/33 512K x 16 Static RAM Document Number: 38-05014 REV. ** *A *B *C *D *E *F ECN NO. 106184 107241 109621 114218 238448 269729 498575 Issue Date 05/10/01 07/24/01 03/11/02 05/01/02 See ECN See ECN See ECN Orig. of Change MGN MGN AJU SYT NXR Description of Change Made corrections to Advance Information Added 55 ns bin Changed from Advance Information to Final Added Automotive Product Information Added Automotive Product information for CY62157CV30 - 70 ns Added IIX and IOZ values for Automotive range of CY62157CV33 - 70 ns Removed Industrial Operating Range Removed 55 ns speed bin Removed CY62157CV25 part number from the Product Offering Added Automotive-A operating range Updated the Ordering Information Table
HRT/MGN New data sheet - Advance Information
GUG/MGN Improved Typical and Max ICC values
Document #: 38-05014 Rev. *F
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